Description
An issue has been identified in Arm C1-Pro before r1p2-50eac0, where, under certain conditions, a TLBI+DSB might fail to ensure the completion of memory accesses related to SME.
Metrics
CVSS 3.1 3.6/10
CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:N/I:L/A:LWeakness enumeration
Affected software
No affected versions have been published.
Timeline
- Published
- Mar 2, 2026
- Last modified
- Jun 17, 2026
- NVD status
- Analyzed