Description
An insufficient DRAM address validation in PMFW may allow a privileged attacker to perform a DMA read from an invalid DRAM address to SRAM, potentially resulting in loss of data integrity.
Metrics
CVSS 3.1 5.2/10
CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:U/C:L/I:H/A:LWeakness enumeration
Affected software
| Vendor | Product | Versions |
|---|---|---|
| AMD | AMD Radeon™ RX 6000 Series Graphics Cards | — |
| AMD | AMD Radeon™ PRO W6000 Series Graphics Cards | — |
| AMD | AMD Radeon™ RX 7000 Series Graphics Cards | — |
| AMD | AMD Radeon™ PRO W7000 Series Graphics Cards | — |
References
Timeline
- Published
- Aug 13, 2024
- Last modified
- Jun 17, 2026
- NVD status
- Deferred