Description
Insufficient access control in protected memory subsystem for SMM for 6th, 7th, 8th and 9th Generation Intel(R) Core(TM) Processor families; Intel(R) Xeon(R) Processor E3-1500 v5 and v6 families; Intel(R) Xeon(R) E-2100 and E-2200 Processor families with Intel(R) Processor Graphics may allow a privileged user to potentially enable information disclosure via local access.
Metrics
CVSS 3.1 5.5/10
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:NAffected software
| Vendor | Product | Versions |
|---|---|---|
| n/a | 2019.2 IPU – Intel(R) Processor Graphics SMM | See provided reference |
References
- https://support.f5.com/csp/article/K51535953?utm_source=f5support&%3Butm_medium=RSS
- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00254.htmlVendor Advisory
- https://support.f5.com/csp/article/K51535953?utm_source=f5support&%3Butm_medium=RSS
- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00254.htmlVendor Advisory
Timeline
- Published
- Nov 14, 2019
- Last modified
- Jun 17, 2026
- NVD status
- Modified