Description
Insufficient memory protection in System Management Mode (SMM) and Intel(R) TXT for certain Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
Metrics
CVSS 3.1 6.7/10
CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:U/C:H/I:H/A:HWeakness enumeration
Affected software
| Vendor | Product | Versions |
|---|---|---|
| n/a | 2019.2 IPU – Intel(R) Processor Security | See provided reference |
References
- https://cert-portal.siemens.com/productcert/pdf/ssa-398519.pdf
- https://support.f5.com/csp/article/K34425791?utm_source=f5support&%3Butm_medium=RSS
- https://support.hpe.com/hpsc/doc/public/display?docLocale=en_US&docId=emr_na-hpesbhf03971en_usThird Party Advisory
- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00240.htmlVendor Advisory
- https://cert-portal.siemens.com/productcert/pdf/ssa-398519.pdf
- https://support.f5.com/csp/article/K34425791?utm_source=f5support&%3Butm_medium=RSS
- https://support.hpe.com/hpsc/doc/public/display?docLocale=en_US&docId=emr_na-hpesbhf03971en_usThird Party Advisory
- https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00240.htmlVendor Advisory
Timeline
- Published
- Nov 14, 2019
- Last modified
- Jun 17, 2026
- NVD status
- Modified