Description
Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.
Metrics
CVSS 3.1 4.7/10
CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:N/A:NWeakness enumeration
Affected software
No affected versions have been published.
Timeline
- Published
- Nov 15, 2018
- Last modified
- Oct 8, 2026
- NVD status
- Modified